Browse Conferences

16-Layer 3D Stacking Based on Self-Assembly Technology for HBM Application
We address a trade-off issue between chip assembly time and positioning accuracy in a traditional pick-and-place method using self-assembly technology driven by liquid surface tension. This method allows 16-layer stacking of 50-um-thin chip...
Direct Sputtered Copper Seed Layer Formation on Low Dielectric Resin to Reduce Transmission Loss
We developed a method to form a copper seed layer directly on resins with excellent dielectric properties using sputtering (referred to as the direct sputtering method). One of the key challenges to implementing 6G wireless communication sy...
Clean Dicing: An Alternative Blade Dicing Technique for Minimising Particles in 3D Heterogeneous Integration
We demonstrate the suitability of a novel blade dicing technique introduced by DISCO that has an output comparable to that of plasma dicing, in terms of particle count and surface cleanliness - known as ‘clean dicing’. This was assessed b...
Process Development for a Novel Low Loss and Non-PFAS Photo Imageable Dielectric for RF Silicon Interposer Applications
We introduce the processing of CYCLOTENE™ XP80 from Dupont, a new non-PFAS photo imageable dielectric (PID) with low dielectric constant (Dk) and low loss tangent (Df) up to 140 GHz, for beyond 5G RF silicon interposers. The total target t...
Antioxidative Cu Electrodeposition for 3D Interconnects with Hybrid Bonding
We found that the thickness of Cu oxide film varies with the type of acid Cu plating. Generally, the oxidation reaction of Cu first produces a monovalent Cu ion Cu<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w...
A Novel Direct Transfer Bonding Process with Particle Less Tapes for Die to Wafer Integration
Die-to-wafer (D2W) technology is expected to be a key method of 3D/heterogeneous integration. Direct Transfer Bonding (DTB) was developed to solve accuracy and throughput due to chip-level handling in D2W. In this paper, Novel DTB, DTB usin...
3D Stacked Spin Qubit by TCAD Simulations
Spin qubit systems are promising candidates for Si-based quantum computing. The conventional spin-qubit cell consists of control and readout units around a quantum dot (QD) with the excess electrons functioning as spin qubits. This complica...
Detectability of Resistive Open Defects with Analog Relaxation Oscillators Under Unit-to-Unit Variations of Dies
We designed a built-in test circuit to detect resistive open defects at interconnects between dies in 3D stacked ICs using relaxation oscillators made of only analog circuit elements. We also designed a test circuit by which process variati...
Impact of 2-Dimensional Materials for 3D Power IC
3D power ICs that stack Si-LSI and GaN power devices three dimensionally are promising candidates for next generation power ICs, primarily because they can minimize the power supply and realize high efficiency. However, miniaturization incr...
Towards 3D AI Hardware: Fine-Grain Hardware Characterization of 3D Stacks for Heterogeneous System Integration & AI Systems
3D integration offers key advantages in improving system performance and efficiency for the End-of-Scaling era. It enables the incorporation of heterogeneous system components and disparate technologies, eliminates off-chip communication co...