Browse Conferences
Impact of Cu Pad Density on Cu-CMP and Bonding Yield for Chip-to-Wafer Hybrid Bonding
The role of metal density around fiducial marks (used for chip alignment) on the quality of chemical-mechanical-planarization (CMP) of Cu bond-pads/electrodes has been meticulously studied via two different layout designs. A gradual increas...
Creep Behavior of Low-Temperature Sn-In Solder Using Nanoindentation Test
Low-temperature solders are required in three-dimensional integrated circuit (3D ICs) to reduce heat input during soldering and for stacking. Sn-52mass%In alloys (Sn-In alloys) is promising because it has a melting point of 119 °C. However,...
Thermal Analysis of Reflow Process for PIC-Embedded Package Substrate with 2.3D RDL Interposer for Co-Packaged Optics
Toward a next generation co-packaged optics (CPO), we have worked on a novel package substrate in which photonics integrated circuits (PICs) are embedded. The substrate can be provided as known good package substrate with optoelectronic con...
3D SRAM Design & Optimization with Open Source Memory Compiler
As the prevalence of AI and big data computing, memory is becoming a performance bottleneck. 3D memory stacking is proposed to deal with this problem. However, memory physical design is a labor-intensive procedure. To the best of our knowle...
Surface Modification for Ultrasonic Cu-to-Cu Direct Bonding
Due to the advantages of low electrical resistance and size miniaturization, Cu-to-Cu direct bonding has become one of the important trends in microelectronic interconnect fabrication. Achieving robust Cu-to-Cu bonding at low temperature, a...
Gate Driver IC for GaN Power Device Suitable for 3D Power IC
This electronic document is three-dimensional(3D) power IC, which GaN power devices stacked with Si based gate driver IC, is attractive. There is a problem of false turn-on for GaN power devices. The one of the promising candidates for solv...
Machine Learning-Based Diagnosis of Defects in Chiplet Interconnects
Integrating Chiplets into advanced packaging technologies presents significant challenges in diagnosing interconnect line defects, primarily due to the immaturity of fabrication processes, reduced interconnect spacing, and increased density...
Low-Temperature Adhesive Hybrid Bonding Technology with Novel Area-Selective Passivation Layer
Hybrid bonding is a crucial technology in 3D IC integration, enabling the combination of different functional chips through vertical interconnections. However, in hybrid bonding, the issue of copper oxidation during the bonding of copper me...
Cost-Effective Low-Temperature Hybrid Bonding Using Layer Transfer Technology
Hybrid bonding has now become one of the most crucial technologies in the field of 3D IC. However, it requires a high degree of surface flatness and precise surface topography control, which increases the cost and complexity of the process....
Characterization of Ozone-Ethylene Radical Pretreatment for Hybrid Bonding without Water Rinsing Processes
An Ozone-Ethylene Radical (OER) generation technology can produce a highly active oxidizing agent of OH radicals by mixing an unsaturated hydrocarbon gas with a highly concentrated ozone gas. The OH radicals given by the OER treatment are e...