IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays
Abstract
Summary form only given. This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E/sup 2/PROMs, and block rewritable "flash" EEPROMs. In addition, reliability hazards are covered with focus on retention, endurance and disturb. There are also clauses on the issues of testing floating gate arrays and their hardness to ionizing radiation.Topic
Components, Circuits, Devices and Systems, Engineered Materials, Dielectrics and Plasmas