Ananda P. De Silva

Also published under:A. P. De Silva, A. De Silva

Affiliation

Freescale Semiconductor, Inc., Tempe, AZ, USA

Topic

Acoustic Waves,Insertion Loss,Matching Network,Surface Acoustic Wave,Transceiver Chip,After Dropping,Array Package,Assembly Operations,Assembly Process,Ball Grid Array,Bond Wires,Boundary Element Method,Brittle Failure,Conventional Packaging,Degree Of Sensitivity,Drop Impact,Drop Impact Test,Drop Test,Dual Band,Electromagnetic Interaction,Electromagnetic Simulation,Eutectic,Face-centered Cubic,Face-centered Cubic Structure,Failure Modes,Failure Morphology,Filter Response,Filtration Performance,Finite Element Method,Form Factor,High Strain Rate,Impedance,Interfacial Failure,Intermetallic,Local Failure,Low Strain Rate,Low-noise Amplifier,Main Resonance,Output Filter,Parasite,Parasitic Capacitance,Parasitic Effects,Pass Band,Plastic Flow,Plastic Packaging,Pyroelectric,S-parameters,Scanning Electron Microscopy,Semiconductor Chip,Si Layer,

Biography

Ananda P. De Silva received the B.Sc. degree in physical sciences in 1984, the M.Phill. degree in analytical chemistry from the University of Paradeniya, Peradeniya, Sri Lanka, in 1988, and the Ph.D. degree in environmental studies from Louisiana State University, Baton Rouge, in 1995.
He is a Senior Staff Engineer at Global Package Engineering Group, Freescale Semiconductor, Inc., Tempe, AZ. He was involved in flip chip package development, Pb-free solder interconnect development, and 150-m pitch interconnect introduction for high-frequency applications. In addition, he worked on RF-MEMS switch technology, MEMS package development for wireless applications, and 3-D integrated package development for high-frequency RF applications. Currently, he primarily focuses on new product introduction and manufacturing of RF modules for wireless applications.