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Jürgen Götze
Also published under:J. Gotze, Jurgen Gotze, Jurgen Götze, Jügen Götze, J. Goetze, Juergen Goetze, J. Götze
Affiliation
Information Processing Lab TU Dortmund, Dortmund, Germany
Topic
Printed Circuit Board,Neural Network,Rise Time,Alternative Models,Artificial Neural Network,Bayesian Optimization,Length Of The Transmission Line,Reinforcement Learning Agent,Circuit Design,Decision Tree,Design Parameters,K-nearest Neighbor,Proximal Policy Optimization,Reinforcement Learning Approach,Reward Function,AI Models,Activation Function,Actor Network,Anomaly Detection,Black-box Optimization,Combination Of Parameters,Decision Tree Approach,Deep Q-network,Design Constraints,Design Process,Electrical Parameters,Electromagnetic Compatibility,Explainable Artificial Intelligence,Hidden Layer,Induction Of Components,Input Variables,Integrality Constraints,Integration Of Signals,Machine Learning,Markov Decision Process,Optimal Performance,Optimization Algorithm,Output Layer,P2P Network,Parameter Space,Physical Description,Power Delivery Network,Printed Circuit Board Design,ReLU Activation Function,Reinforcement Learning Algorithm,Reinforcement Learning Methods,Root Mean Square Error,Search Space,Slew Rate,Support Vector Regression,
Biography
Jürgen Götze received his Dipl.-Ing. and Dr.-Ing. degrees in Electrical Engineering from Munich University of Technology, Germany, in 1987 and 1990, respectively. From 1991 to 1992 he held a research position at the Computer Science Department of Yale University. From 1992 to 1995 he was with the Department of Electrical Engineering and Information Technology of Munich University of Technology. From 1995 to 1996 he was with the DSP group of the Electrical and Computer Engineering Department of Rice University. Since 1997 he is Professor (Information Processing Lab) at the Department of Electrical Engineering and Information Technology of TU Dortmund University. He served as Associate Editor of IEEE Transactions on Circuits and Systems, Part I: Fundamental Theory and Applications from 1997 to 1999. His research interests include: signal and array processing, wireless communications, parallel algorithms and architectures, system-on-chip.