Topic
- Computing and Processing
- Components, Circuits, Devices and Systems
- Communication, Networking and Broadcast Technologies
- Power, Energy and Industry Applications
- Signal Processing and Analysis
- Robotics and Control Systems
- General Topics for Engineers
- Fields, Waves and Electromagnetics
- Engineered Materials, Dielectrics and Plasmas
- Bioengineering
- Transportation
- Photonics and Electrooptics
- Engineering Profession
- Aerospace
- Geoscience
- Nuclear Engineering
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- English for Technical Professionals
Shankar Balachandran
Affiliation
Intel Processor Architecture Research Lab
Topic
Convolutional Layers,Data Cache,Load Data,Access Latency,Application Of Neural Networks,Application Running,Bandwidth Increases,Baseline System,CPU Memory,Cache Hit,Characterization Methodology,Concatenation Layer,Context Switching,Core Processes,Critical Path,Data Reuse,Datapath,Deep Neural Network,Deep Neural Network Model,Division Of Work,Energy Reduction,Functional Unit,General Purpose,High Coverage,High Performance,Highest Prediction Accuracy,Individual Characteristics,Iteration Count,Key Idea,Key Observation,Key Takeaway,Key Techniques,L2 Cache,Load Request,Long Memory,Low Hit Rate,Memory Model,Misprediction,Network-on-chip,Off-chip Memory,Output Elements,Parallel Data,Parallelization,Performance Benefits,Performance Gain,Physical Address,Physical Cores,Pipeline Stages,Power Overhead,Prediction Accuracy,
Biography
Shankar Balachandran received the PhD degree from the U.T., Dallas.
He works at Intel Labs, Bangalore. His research interests include computer architecture, VLSI design automation, and
parallel algorithms.