Chung Len Lee

Also published under:Chung-Len Lee

Affiliation

Key Laboratory of Integrated Microsystems School of ECE, Peking University, Shenzhen, China

Topic

Power Consumption,Compressor,Digital Signal Processing,Half Adder,Least Significant Bit,Partial Products,3D Architecture,Adjacent Cells,Area Overhead,Bit Error,Booth Multiplier,CMOS Technology,Cell Library,Chip Size,Class Assignment,Codeword,Coding Matrix,Control Signal,Conventional Scheme,Convolutional Codes,Current Source,Data Rate,Decoding Process,Decoding Scheme,Different Types Of Materials,Digital Pulse,Encoding Strategies,Energy Conservation,Equivalent Fault,Error Patterns,Exhaustive Method,Extra Production,Federal Communications Commission,Forward Error Correction,Gaussian Pulse,General Method,Generator Matrix,Good Symmetry,Hardware Implementation,High Gain,Impedance,Input Patterns,Input Signal,Input State,Low Noise,Low Phase Noise,Low Supply,Low Temperature Coefficient,Matching Network,Most Significant Bit,

Biography

Chung Len Lee is a faculty member in the Department of Electronics Engineering at National Chiao Tung University, Taiwan. His research interests include IC design, CAD, and testing. Lee has a BS from National Taiwan University and an MS and PhD from Carnegie Mellon University, all in electrical engineering. He is a senior member of IEEE Computer Society.