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- Computing and Processing
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Hsing-Chung Liang
Affiliation
Department of Electronic Engineering, Chung Yuan Christian University, Taiwan
Topic
Booth Multiplier,Commercial Tools,Complete Algorithm,Constant Pattern,Constant Vector,Defect Model,Defects In Cells,Delay Fault,Descriptive Level,Economical Solution,Effective Coefficient,Exact Threshold,Heuristic Algorithm,High Coverage,Largest Coefficient,Memory Cells,Memory Size,Regional Clusters,Regular Structure,Repair Solution,Row Column,Sequence Of Events,Step Of Procedure,Test Pattern,Dependency Graph,Input Sequence,Reachable States,Sequential Circuits,Test Sequences,Unknown State,Combined Set,Fault Simulation,Input Combinations,Input Line,Primary Input,Primary Output,State Diagram,Test Design,Types Of Defects,Values Of Lines,Area Overhead,Clock Rate,Consideration For Selection,Hardware Overhead,Invalid State,Inverter,Large Nodes,Line Features,Node Level,Nodes In The Graph,
Biography
Hsing-Chung Liang received his B.S., M.S., and Ph.D. degrees in Electronic Engineering from National Chiao Tung University, Taiwan, R.O.C., in 1989, 1991, and 1997, respectively. He served in the Department of Electronic Engineering, Van Nung Institute of Technology (present Vanung University), Taiwan, from 1997 to 1999. He has been an Assistant Professor with the Department of Electronic Engineering, Chang Gung University since 1999. His research interests include memory reconfiguration, built-in self-repair, system-on-a-chip testing, design for testability, and test generation algorithms. He is a member of IEEE.