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Sung-Gi Ahn
Affiliation
Memory Division, Samsung Electronics, Hwaseong, South Korea
Topic
Cyclic Redundancy Check,Design Techniques,Error Control,Error Detection,Parity-check,Pattern Generator,Read Operation,Test Pattern,Active Switches,Area Overhead,Bank Group,Bit Error,Bit Error Rate,Block Diagram,Chip Size,Codeword,Control Logic,Data Bus,Data Window,High Bandwidth,High Capacity,High Frequency Modes,Host Side,Low-frequency Domain,Low-frequency Modes,Manufacturing Defects,Memory Capacity,Memory System,Operating Frequency,Parallelization,Practical Techniques,Serialized,Stable Performance,Synergetic,Testing Coverage,Timing Diagram,Transaction Data,Voltage Drop,
Biography
Sung-Gi Ahn received the B.S. and M.S. degrees from the Department of Semiconductor Systems Engineering, Sungkyunkwan University, Suwon, South Korea, in 2016 and 2018, respectively.
In 2016, he joined the Memory Division, Samsung Electronics, Hwaseong, South Korea, where he has been involved in high-bandwidth memory (HBM) chip design. His research interests include low-power and high-performance DRAM design.
In 2016, he joined the Memory Division, Samsung Electronics, Hwaseong, South Korea, where he has been involved in high-bandwidth memory (HBM) chip design. His research interests include low-power and high-performance DRAM design.