Michael Canonico

Carrier Mobility,Transconductance,Annealed Samples,Biaxial Stress,Bond Breaking,Bulk Si,Electron Beam Lithography,Electron Transport,Ergogenic,Filler Material,Film Stress,Gamma-ray Irradiation,High-temperature Annealing,Induction Of Stress,Interconnecting Layer,Length Range,Longitudinal Phonon,Low Stress,Planar Devices,Raman Spectroscopy,Rapid Thermal Annealing,Ray Irradiation,Reactive Ion Etching,Sidewall,Silicon Nanowires,Silicon Vias,Silicon-on-insulator,Stable Strain,Strain Changes,Strain Relaxation,Stress Values,Subthreshold Swing,Tensile,Thermal Oxidation,Thermal Process,Through Silicon Via,Transfer Characteristics,Transverse Direction,Tungsten,X-ray Methods,Mobility Enhancement,Secondary Ion Mass Spectrometry,Biaxial Strain,Compressive Strain,Crystallinity,Device Performance,Gate Current,Ge Concentration,Interface Roughness,Si Layer,