Shahrukh Agha

Affiliation

Department of Electrical and Computer Engineering, COMSATS University Islamabad, Islamabad, Pakistan

Topic

Clock Frequency,Power Consumption,Average Latency,Battery Power,Bit Error,Bit Error Rate,Bit Error Rate Performance,Central Node,Clock Cycles,Column Sums,Computational Complexity,Convolutional Codes,Current Frame,Decoder Architecture,Decoding Process,Diverse Paths,End Of Window,Energy Conservation,Error Floor,Error Rate Performance,Fault-tolerant,Forward Error Correction,Frame Size,Full Calculation,High Throughput,Hop Count,Horizontal Motion,Information Bits,Interconnected Network,Large Motion,Least Significant Bit,Left Position,Left Shift,Less Than Or Equal,Level Of Parallelism,Likelihood Ratio Test,Maximum A Posteriori Probability,Mesh Network,Motion Estimation,Motion Sequences,Motion Vector,Network Cost,Network Diameter,Network Latency,Network Performance,Network Topology,On-chip Communication,Output Buffer,Output Ports,Pair Of Nodes,

Biography

Shahrukh Agha received the Ph.D. degree in software and hardware techniques for accelerating MPEG motion estimation from Loughborough University, U.K., in 2006. He is currently an Assistant Professor with the Department of Electrical and Computer Engineering, COMSATS University Islamabad, Islamabad, Pakistan. His research interests include low power real time VLSI implementations of digital video and signal processing algorithms.