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Naveed Khan Baloch
Affiliation
Department of Computer Engineering, University of Engineering and Technology (UET), Taxila, Pakistan
Topic
Fault-tolerant,Ant Colony Optimization,Communication Cost,Energy Consumption,Mapping Algorithm,Mapping Techniques,Network-on-chip,Neural Network,Power Consumption,Routing Algorithm,Support Vector Machine,3D Architecture,5-year Survival,Adaptive Threshold,Area Overhead,Artificial Neural Network,Average Latency,Behavior Of Birds,Bipolar Electrode,Bird Eggs,Bird Hosts,Bounding Box,Brain Tumor Classification,Brain Tumor Detection,Brain Tumor Imaging,Brood Parasites,Checkers,Classification Of Tumors,Communication Bandwidth,Communication Latency,Component Of Image,Constant Threshold,Constructive Heuristic,Control Unit,Corrupted Data,Cuckoo Search,Cuckoo Search Optimization,Deadlock,Dielectric Breakdown,Disabled People,Diseases In The World,Eggs In Nests,Electrical Activity,Electromyography Signals,Empirical Mode Decomposition,Exact Mapping,Field-effect Transistors,Final Map,Finger Motion,Free Buffer,
Biography
Naveed Khan Baloch received the B.Sc. degree in computer engineering from the University of Engineering and Technology (UET), Taxila, Pakistan, in 2007, and the M.S. degree and the Ph.D. degree in computer engineering from UET Taxila. From 2007 to 2010, he worked in multinational companies as an Embedded System Designer. He joined the UET Taxila, as a Lecturer. He is currently working as an Assistant Professor with the Computer Engineering Department, UET Taxila. He has published many research articles in his field and has experience in embedded system design, fault tolerant systems, reconfigurable computing, and he is also working on self-healing digital systems. During his tenure in academia, he did many collaborations with industry and foreign universities in the field of on-chip networks, embedded vision, and reconfigurable computing.