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Yvon Savaria
Also published under:Y. Savaria
Affiliation
Department of Electrical Engineering, Polytechnique Montréal, Montreal, QC, Canada
Topic
Input Signal,Power Consumption,Neural Network,Deep Neural Network,CMOS Technology,Digital Circuits,Internet Of Things,Packet Processing,Clock Cycles,Control Plane,Dot Product,Energy Harvesting,Energy Harvesting System,Input Voltage,Packet Header,Power Devices,Bandwidth Utilization,Boost Converter,Charge Pump,Code Generation,Data Packets,Dcdc Converter,Deep Neural Network Layers,Domain-specific Languages,Figure Of Merit,Finite Impulse Response Filter,Gate Driver,Hardware Architecture,Hardware Implementation,High-level Synthesis,Low Voltage,Monte Carlo Simulation,Operating Frequency,Passive Components,Power Loss,Scheduling Algorithm,Service Quality,State Machine,Switching Network,Thermoelectric Generators,Vector Process,5G Networks,Access Network,Accuracy Of Model,Ambient Energy,Analog Circuits,Analog-to-digital Converter,Area Overhead,Backpropagation Through Time,Buck Converter,
Biography
Yvon Savaria (Fellow, IEEE) received the B.Ing. and M.Sc.A. degrees in electrical engineering from the École Polytechnique de Montreal, in 1980 and 1982, respectively, and the Ph.D. degree in electrical engineering from McGill University, in 1985. Since 1985, he has been with Polytechnique Montréal, where he is currently a Professor with the Department of Electrical Engineering. He is also affiliated with the Hangzhou Innovation Institute, Beihang University. He has carried out work in several areas related to microelectronic circuits and microsystems, such as testing, verification, validation, clocking methods, defect and fault tolerance, effects of radiation on electronics, high-speed interconnects and circuit design techniques, CAD methods, reconfigurable computing and applications of microelectronics to telecommunications, aerospace, image processing, video processing, radar signal processing, and the acceleration of digital signal processing. He is also involved in several projects related to embedded systems in aircrafts, radiation effects on electronics, asynchronous circuit design and testing, green IT, wireless sensor networks, virtual networks, software-defined networks, machine learning, embedded ML, computational efficiency, and application-specific architecture design. He holds 16 patents, has published 180 journal articles and 480 conference papers, and was the thesis advisor of 170 graduate students who completed their studies. He was the Program Co-Chairperson of NEWCAS’2018 and the General Chairperson of NEWCAS’2020. He has been working as a Consultant or was sponsored for carrying out research with Bombardier, Buspass, CNRC, Design Workshop, Dolphin, DREO, Ericsson, Genesis, Gennum, Huawei, Hyperchip, Intel, ISR, Kaloom, LTRIM, Miranda, MiroTech, Nortel, Octasic, PMC-Sierra, Space Codesign, Technocap, Thales, Tundra, and Wavelite. He is a member of the Executive Committee of the Regroupement Stratégique en Microélectronique du Québec (RESMIQ) and a member of the Ordre des Ingénieurs du Québec (OIQ). He is also a member of the CMC Microsystems Technical Advisory Committee. In 2001, he was awarded a Tier 1 Canada Research Chair (http://www.chairs.gc.ca) on the designs and architectures of advanced microelectronic systems that he held until June 2015. He also received a Synergy Award of the Natural Sciences and Engineering Research Council of Canada, in 2006. Since June 2019, he has been a NSERC-Kaloom-Intel-Noviflow (KIN) Chair Professor.