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Alon Amid
Also published under:A. Amid
Affiliation
UC Berkeley
Topic
L2 Cache,Public Cloud,Deep Neural Network,Digital Technologies,Hardware Accelerators,Misprediction,Physical Design,Software Development,Test Chip,Academic Users,Agile Development,AlexNet,Amazon Web Services,Benchmark,Core Processes,Data Cache,Debugging,Design Cycle,Design Flow,Digital Signal Processing,Electronic Design Automation,Hardware Development,Hardware Implementation,Hierarchical Design,Memory Hierarchy,Memory System,Microarchitecture,Open-source Hardware,Open-source Tool,Per Cycle,Physical Flow,Processing Technology,Simulation Platform,Simulation Software,Software Stack,Spatial Array,SqueezeNet,Virtual Memory,28-nm Fully Depleted Silicon On Insulator,Abstraction Layer,Adaptive Algorithm,Advanced Architectures,Advanced Classes,Aid In The Identification,Analog-to-digital Converter,Applicability Domain,Application Of Deep Neural Networks,Application Programming Interface,Area In Recent Years,Building Process,
Biography
Alon Amid is currently working toward the Ph.D. degree at the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley. His research interests include parallel and distributed computing, energy-efficient processors and architectures, and hardware–software codesign. Amid received the B.Sc. degree in electrical engineering from Technion—Israel Institute of Technology, and the M.S. degree from the University of California, Berkeley. Contact him at [email protected].