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Abderazek Ben Abdallah
Also published under:Abderazek Abdallah
Affiliation
The Graduate School of Computer Science and Engineering, The University of Aizu, Aizu-Wakamatsu, Fukushima, Japan
Topic
Neural Network,Spiking Neural Networks,Neuromorphic Systems,Artificial Neural Network,Power Consumption,Fault-tolerant,Mapping Method,Spike-timing-dependent Plasticity,Communication Cost,Defect Rate,Network Interface,Neuronal Clusters,Output Spike,Chest X-ray Images,Deep Learning,Detection Of Pneumonia,Edge Devices,Electric Vehicles,Energy Consumption,Evaluation Methodology,Hardware Architecture,Leaky Integrate-and-fire,Linear Function,MNIST Dataset,Maximum Temperature,Stacked Layers,Synaptic Weights,3D Mesh,3D System,Area Overhead,Clustering Method,Collaborative Learning Process,Communication Overhead,Computing Units,Conventional Architecture,Convolutional Layers,Defect Layer,Energy Allocation,Energy Demand,Energy Exchange,Energy Market,Energy Supply,Energy Trading,Federated Learning,Forward Error Correction,Fractional Parameter,Genetic Algorithm Approach,Global Model,Input Spike,Large-scale Systems,
Biography
Abderazek Ben Abdallah (Senior Member, IEEE) received the Ph.D. degree in computer engineering from The University of Electro-Communications, Tokyo, in 2002. He has been a Faculty Member with The University of Aizu, since 2007. Before joining The University of Aizu, he was a Research Associate with the Graduate School of Information Systems, The University of Electro-Communications, from 2002 to 2007. He is currently a Full Professor of computer science and engineering and the Head of the Division of Computer Engineering, The University of Aizu. He has authored three books, published more than 150 journal articles and conference papers in these areas, and given invited talks as well as courses at several universities. He has been a PI or a CoPI of several projects for developing next generation high-performance reliable computing systems for applications in general purpose and pervasive computing. His research interest includes computer system and architecture, with an emphasis on adaptive/self-organizing systems, networks-onchip/SoCs, processor micro-architecture, and power and reliability-aware architectures. He is also interested in neuro-inspired systems and VLSI design for 3D-ICs. He is a Senior Member of ACM and a member of IEICE.