Peter Athanas

Also published under:P. Athanas, Peter M. Athanas, P. M. Athanas

Affiliation

Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia, USA

Topic

Graph Partitioning,Graph Size,Block Partitioning,Community Detection,Community Structure,Graph Generation,Graph Properties,Graph Structure,Group Labels,Nodes In The Graph,Set Of Graphs,Sparse Graph,Spectral Clustering,Spectral Method,Static Graph,Total Execution Time,Applicability Domain,Baseline Algorithms,Batch Size,Block Structure,Breadth-first Search,C++ Implementation,Changes In Community Structure,Clustering Coefficient,Community Detection Methods,Computational Efficiency,Configuration Design,Conjugate Gradient,Constant Factor,Design Space Exploration,Dynamic Graph,Dynamic Model,Eigenvalues,Eigenvectors,Fewer Nodes,Finite Element Mesh,Graph Algorithms,Graph Datasets,Graph Features,Graph Neural Networks,Graph Processing,Graph Summarization,Graphical Analysis,Graphical Summary,Hardware Architecture,Hardware Resources,Hidden State,High Diversity,High Parallelism,High-level Synthesis,

Biography

Peter Athanas (SM’98) received the B.S. degree from the University of Toledo, Toledo, OH, USA, in 1983, the M.S.E.E. degree from Rensselaer Polytechnic Institute, Troy, NY, USA, in 1986, the Sc.M. degree in applied mathematics from Brown University, Providence, RI, USA, in 1990, and the Ph.D. degree from Brown University in 1992.
He is currently a Professor of computer engineering with Virginia Tech, Blacksburg, VA, USA. He is the Director of the Virginia Tech Configurable Computing Lab and the Site Director of the Center for High-Performance Reconfigurable Computing. His research interests include configurable computing, computer architecture, and computer-aided design.