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- Computing and Processing
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- General Topics for Engineers
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- Engineered Materials, Dielectrics and Plasmas
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- English for Technical Professionals
Josep Altet
Also published under:J. Altet
Affiliation
Universitat Politècnica de Catalunya (UPC), Barcelona, Spain
Topic
Energy Efficiency,Graphics Processing Unit,Power Consumption,Area Overhead,Deep Neural Network,Hardware Accelerators,Low Precision,Additional Bits,Advanced Driver Assistance Systems,Amount Of Shift,Approximate Computation,Approximate Hardware,Approximate Version,Binary Segmentation,Bounding Box,Cache Misses,Computational Efficiency,Convolution Accelerator,Convolution Kernel,Convolutional Neural Network,Data Bus,Data Elements,Deep Convolutional Neural Network,Deep Neural Network Layers,Deep Neural Network Model,Design Points,Design Space Exploration,Dilated Convolution,Edge Devices,Electronic Design Automation,Elements Of Interest,Feature Maps,Full Baseline,Functional Unit,Ground Plane,High Energy Efficiency,Horizontal Dimension,Input Values,Instruction Set Architecture,Integer Multiple,Kernel Shape,L2 Cache,Least Significant Bit,Linear Algebra,Local Elements,Matrix Inequalities,Matrix Size,Memory Bandwidth,Memory Hierarchy,Minimal Overhead,
Biography
Josep Altet is currently with the Department of Electronic Engineering, Universitat Politècnica de Catalunya, Barcelona, as an Associate Professor. His teaching and research activities are related with analog and digital microelectronic design. He has done research collaborations with research groups of the Université Bordeaux I, Akita University, TIMA (Grenoble), The University of British Columbia, Texas A&M University, CNM-Barcelona, and CEA-LETI (Grenoble).